This invention relates generally to nondestructive evaluation of semiconductor materials. More particularly, it relates to a non-contact method for determining the mobility properties below a dielectric/semiconductor interface.
Nondestructive evaluation and testing has achieved widespread industrial use. In the construction and automobile manufacturing industry, eddy current testing is used for the evaluation of steel welds and ultrasonic testing for the critical dimension measurement of manufactured parts. Eddy current testing measures the quality of steel welds by measuring inductive losses in the mental parts and ultrasonic testing looks at the phase of reflected sound waves to measure the critical dimensions of parts.
Over the past decade, the semiconductor industry has used nondestructive evaluation for a variety of measurements. As with other manufacturing sectors, critical dimensions device analysis is important for quality control of transistor devices. Critical dimensions can be found. from in-line contactless scanning electron micrographs (in-line SEM) or by tapping mode atomic force microscopy (AFM) for submicron profilometry.
Other areas which require nondestructive evaluation are measurements of doping profiles, integrated sheet resistance and carrier lifetimes. The most common means of measuring such semiconductor quantities is by fabricating test structures during the production run and probing them later. For example, from the current voltage characteristics of the so-called xe2x80x9c4-point-probexe2x80x9d test structure, the integrated sheet resistance of an implanted or epitaxially grown region can be determined. Another example is the use of Hall probe test structures for the characterization of the type (i.e., a donor or acceptor) and background doping concentration. Such post-processing evaluation techniques require special test structures to be built during wafer production. Physical and electrical contact is made with the test devices on the wafer. If dopant profiling across the wafer needs to be performed, a series of spreading-resistance measurements must be made. Once pulled from the production mainline, such wafers are considered contaminated and are not placed back into the mainline for further processing. Obviously, such testing is important for quality control during integrated circuit fabrication but such contact testing is both time consuming and wasteful of wafer real estate.
Given the limitations of the above-mentioned testing methods, there has been a move in the semiconductor industry towards contactless, in-line, nondestructive evaluation. One of the first successful methods of this type was developed by Therma-Wave, Inc. of California. The method relies on using a laser to excite thermal waves in the test sample. Dopants, impurities and lattice imperfections in the sample affect the propagation of the thermal wave. Hence, a measurement of the thermal wave in the test sample, e.g., magnitude of the thermal wave, damping coefficients etc., give an indication of the sample properties. This method has been a very successful and has lead to the development of a variety of new in-situ contactless metrology tools.
Noncontact measurement of bulk wafer sheet-resistance was achieved through the use of eddy current loss measurements and is described, e.g., in U.S. Pat. No. 4,302,721 to Urbanek et al. If the wafer thickness is known, e.g., obtained from an ultrasonic test, then the sheet resistance of the wafer can be calculated without the need to make special test structures through a measurement of eddy current loss. Eddy current testers can measure the integrated sheet resistance on a bulk wafer or a highly conductive layer on top of a high resistivity substrate with a spatial resolution of 1 mm. In addition to measuring bulk sheet resistance, the eddy current method can be used for measuring bulk carrier lifetimes when combined with other measurement techniques. Unfortunately, eddy current testing can not provide specific information about the doping profile and carrier mobility separately. A resistance vs. depth profile can be generated but it does not give yield accurate measurements of carrier mobility at distances less than one Debye Length (Ld) from the surface.
To obtain higher quality near surface metrology, standardized capacitance vs. voltage (C-V measurements) must be performed on MOS devices. This technique involves recording the capacitance of a MOS device versus the applied gate voltage. C-V measurements help to characterize both the charge state of a passivating gate oxide and the doping level of the silicon near the silicon dioxide interface. Traditionally, C-V measurements are performed on MOS test structures fabricated next to integrated circuit devices. More recently, mercury probes have been used to make a temporary metal contact of known area after the gate oxide is grown. After performing C-V measurements, the temporary mercury contact is removed from a wafer with a vacuum needle designed to retract the mercury. However, given the cross contamination concerns, the semiconductor industry usually discards these wafers after testing. More recent advances and techniques for performing C-V measurements can be found, e.g., in U.S. Pat. No. 5,065,103 to J. A. Slinkman et al. and other literature. Unfortunately, C-V test require significant surface preparation and can not be performed over active devices.
Surface photovoltage measurements (SPV) can also be used as a contactless method for probing semiconductor properties near the surface of a semiconductor wafer. In the SPV method the surface of the wafer being examined is illuminated with a sequence of high intensity laser pulses with a photon energy greater than the silicon bandgap. These pulses induce a change in the equilibrium carrier population in the conduction and valence band. This in turn leads to an oscillating photovoltage which can be capacitively sensed and then measured as a function of a DC voltage bias. Such surface photovoltage measurements can be used to measure carrier lifetimes, band bending and carrier concentration near the surface. Further information of the application of this method to sheet resistance measurements is found in U.S. Pat. No. 5,442,297 to Verkuil.
More recently, SPV measurements have been combined with a new measurement technique under the trademark Quantox, which relies on the deposition of ionized charge on the top layer of a gate oxide. The deposited charge is created using a corona method to ionize air molecules. The amount of charge that is deposited on the surface of the wafer can be inferred from a coulombmeter placed in series with the wafer chuck. By plotting the charge deposition versus the surface photovoltage, near surface doping and the trapped oxide charge density (interface trapped charge, mobile ionic charge and permanent charge densities) can be accurately determined.
Despite the above advances in the art, there is still a lack of effective methods for measuring a number of electronic properties of conductors in the near-surface region. Such measurements are especially important in measuring electronic properties such as carrier mobility of both majority and minority charge carriers in semiconductors very close to the surface. For example, at present there is no contactless in-situ method for the nondestructive evaluation of the near surface carrier mobility that can be used as a diagnostic tool prior to the testing of post-processed transistors. A nondestructive, contactless technique for determining the near surface carrier mobility and device characteristics related to mobility during the initial stages of fabrication would be a valuable metrology tool.
In view of the above, it is a primary object of the invention to provide an apparatus and a method for measuring near-surface charge mobility in conductors across a dielectric. Specifically, it is an object of the invention to provide for contactless and non-destructive measurement of electronic properties of both minority and majority charge carriers in conductors. These measurements include electronic properties such as mobility, lifetime and surface resistivity in the region close to the conductor and dielectric interface.
It is another object of the invention to provide a nondestructive method of measuring electronic properties of various types of conductors including semiconductors and conducting polymers.
These and other objects and advantages will become apparent upon reading the detailed description.
The objects and advantages of the invention are achieved by an apparatus using a resonator probe for determining an electronic property of a conductor across a dielectric. The resonator probe is positioned a certain distance from the conductor. The apparatus has a device for inducing lateral mechanical oscillations of the resonator probe and a voltage source for producing a voltage difference between the resonator probe and the conductor. The voltage difference creates an electronic drag between the conductor and resonator probe. The lateral oscillation of the resonator probe experiences a damping due to the electronic drag. A unit belonging to the apparatus determines the electronic property of the conductor from the damping of the oscillations of the resonator probe.
There are many possible devices for inducing mechanical oscillations of the resonator probe. For example, in one embodiment the device for inducing, the mechanical oscillations is a capacitive drive positioned near the resonator probe. Similarly, there are many units which can monitor the mechanical oscillations of the resonator probe. In one embodiment, the unit is an optical oscillation monitoring system. Furthermore, the oscillation monitoring unit conveniently includes logic or processing circuits for determining the damping and/or the Q-factor of the resonator probe. Also, in one embodiment of the invention, the apparatus is further equipped with a distance control for controlling and adjusting the distance between the resonator probe and the conductor.
The resonator probe in which the mechanical oscillations are induced can have various form factors. For example, the resonator probe can have one or more resonator members. In one embodiment, the resonator probe has two resonator members or arms extending parallel to each other thus forming a tuning fork. For measurements on millimeter scales, as is typically desired in industry, measurements can be performed using a piezoelectric tuning fork quartz oscillator using conventional electronic circuitry. In another embodiment, the resonator probe has only one resonator member in the form of a cantilever. Other designs can employ resonator members with more than two arms.
The voltage source of the apparatus is conveniently a versatile source capable of producing a positive and a negative voltage difference between the conductor and the resonator probe. This permits the user to study the electronic properties of both majority and minority charge carriers. The many properties which can be studied with the apparatus of the invention include parameters such as quantity of charge carriers, surface mobility of charge carriers, surface resistivity and charge carrier lifetime. These properties can be studied in conductors such as metal conductors, semiconductors and organic conductors. In any of these, the dielectric can be any dielectric or dielectric. layer including the naturally forming oxide layer or a layer such as passivation or protective layer purposely deposited on the conductor.
The method of the invention is practiced by first positioning the resonator probe above the dielectric and inducing lateral mechanical oscillations in the resonator probe. The voltage difference applied between the resonator probe and the conductor will affect the amount of electronic drag and hence the strength of the damping action. Thus, a comparison of the damping action at various voltage differences, e.g., no voltage difference and a particular voltage difference, yields information about the electronic drag and thereby about the electronic properties.
As mentioned above, the mechanical oscillations induced in the resonator probe can be applied by any suitable device. It should be noted, that in cases where air resistance plays a significant role in damping the oscillations the resonator probe can be operated in a vacuum.
The method of the invention is particularly useful for monitoring carrier mobility in the inversion layer underneath the gate-oxide prior to MOSFET fabrication. In addition to traditional silicon MOSFETs, the current method can be used to measure mobilities in conducting polymers used in organic semiconductor light emitting diodes and organic transistors.
The specifics of the apparatus and method of the invention as well as its applications are discussed in the detailed description in reference to the attached drawing figures.